1. Field of the Invention
The present invention relates to an asynchronous transfer mode (hereinafter, referred to as ATM) cell boundary identification apparatus and method, which facilitates extraction of the ATM cell from a reception terminal, and prevents an error generation by serially mapping the ATM cell on each time slot of a frame E1 for the period of one multi-frame.
2. Discussion of Related Art
In general, the ATM is to add a destination information to a packet header by dividing a user information into a constant size of packet, and is then to restore the information transferred as a fixed size of cell to an original information.
The ATM cell should consist of a header field of 5 byte and information field of 48 byte. A connection of the cell is discriminated by a virtual path identifier VPI and a virtual channel identifier VCI within a cell header.
In the meantime, in case that the ATM cells are mapped on a framer DS1E and then transferred, a transmission terminal is to generate and insert a cell for header error control HEC with respect to the cell received from a ATM layer, and then is to transmit the ATM cell to the framer DS1E after adjusting the speed of a physical layer with that of the ATM layer through an insertion of an idle cell thereinto.
That is, the speed of the cell received from the ATM layer does not always coincide with information capacity of a transmission path. Thus, in order to fill up a gap between the cells received from the ATM layer, the idle cell is generated in a TC which has functions of generating and canceling a transmission frame, and of mapping the ATM cell on a payload of the transmission frame. The idle cell is then inserted into the gap. The idle cell should have a specific cell header value. According to the cell header value the idle cell is identified and is then disused.
Further, in case that a transfer bit error is of the ATM cell header during the cell transmission, there may happen a cell loss and a cell insertion error to influence on the service quality. So, in order to reduce a cell header error generation probability, a header error control HEC information is included in the last 1 byte of the cell header of 5 byte, the header error control information being used for correcting the error of the header and detecting a plurality of bit errors. Even though the HEC has a cycle redundancy check CRC, the TC corrects the error of the header by operating the CRC.
A value of the HEC is obtained by regarding a bit row of the original header of 32 bit as a polynomial A(X) (where, the coefficient of the highest ranked term is the first bit). Here, a remainder R(x) is given by dividing a value A(X)X.sup.8 multiplied by X.sup.8 by a CRC generation polynomial P(x)=X.sup.2 +X+1. However, a bit pattern of the real HEC is given as a form obtained by adding a polynomial C(x=x.sup.6 +x.sup.4 +x.sup.2 +1 (01010101) to the remainder R(x) in order to enhance the capacity of the cell synchronization of the bit row (this indicates that the cell synchronization streams by the bit). Through the above step, the ATM cell can be mapped on the frame E1 to achieve the cell transmission. If a cell stream is extracted from the payload DS1E in the reception terminal, the boundary of the ATM cell is identified from the call received from the framer DS1E. And, only an effect cell from which the idle cell and the header error control HEC cell are eliminated, is then transferred to the ATM layer.
That is, in the reception terminal is to identify a front position (cell boundary) of each cell from the cell stream received by setting the cell synchronization through a "magnetic synchronization" using a header error control field (1 octet).
With reference to the attached drawings, the operations will be in detail explained as follows.
In case that the synchronization is intended to be set from a synchronization secession state, i.e., a hunting state, the received bit is temporarily regarded as a front bit of the cell, and the HEC is then calculated. Thereafter, the result of the calculation is compared with the fifth byte. Through the such operations, the front bit is shifted by 1 bit and the HEC is repeatedly calculated to obtain an exact result of the operation. Thereby, once the exact result of the operation is obtained, there can be judged that the cell synchronization is at a state being the same as the synchronization state. And, the HEC should be calculated every 53 byte from that. Thereafter, if the value of HEC is exactly obtained in the M-th, it is regarded as a fact that the cell synchronization is obtained and its state is changed to a synchronization establishment state. Under the synchronization establishment state, if an error arises in the HEC, the state is changed to the hunting state by regarding the synchronization as being secluded through the N-th consecutive error generation.
A reason that there is a delay in judgement between in the synchronization establishment state and the synchronization secession state, is to guarantee a stable operation. The delay when judging the synchronization establishment state from the hunting state is called "backward protection" and the delay when judging the synchronization secession state from the synchronization establishment state is called "forward protection".
The TC has a function of helping the cell to be synchronous. Especially, a magnetic synchronous scrambler of the TC of the transmission and reception terminals performs the function, and it also uses a polynomial X.sup.43 +1 in the payload of the cell.
Therefore, even though any one pattern like the header is temporarily included in the payload, it is impossible for the reception terminal to establish a wrong synchronization by misunderstanding it as the header.
In the meantime, the magnetic synchronous scrambler converts the original information by adding the original information previous to 43 bit, in case of using the above polynomial X.sup.43 +1 .
However, as mentioned above, in the method for transmitting/receiving the cell of a conventional physical layer, there arise problems in that it is difficult to extract the cell and a time required in extracting the cell becomes long, since the cell extraction is performed through a complicated algorism like the cell synchronization establishment during the extraction of the cell.